ASIC Architect Announces the Availability of Multi-Port Intelligent Arbiter and Scheduler for DDR Controller Cores

ASIC Architect strengthens its position in DDR Controller for high-end ASIC and SoC market.

Santa Clara, CA (PRWEB) April 28, 2008 -- ASIC Architect, Inc. today announced the availability of Multi-Port Intelligent Arbiter and Scheduler (MPIAS) with optional AMBA 3 AXI or AMBA 2 AHB Interface for it successful DDR Controller Cores. This follows the footsteps of company's highly successful industry-leading controllers in the area of PCI Express, DDR and SATA.

ASIC Architect is high-speed controller solutions company, focused on ASIC/SoC. The company's portfolio of high end products includes PCI Express, DDR and SATA Controller cores. The core products, when combined with bridge products like AMBA bridges, provide powerful system level solution for customers.

We continue to have focused growth to serve our high-end ASIC/SoC customers. The MPIAS is an important addition to our existing product portfolio. It is a requirement for today's complex SoC to have guaranteed and controlled DDR Controller bandwidth

The MPIAS is an optional add-on product that can be added to the standard offering of single port DDR Controller core. This product is configurable up to 16 DDR ports, and each of these ports can either be a generic interface or AMBA AHB/AMBA AXI interface. The user programmable features help the customer to control or allocate the bandwidth across agents. The factors that decide on the winner in this intelligent arbitration and scheduling scheme are priority, credit (QOS), bank and aging. In a complex SoC system, there can be one DDR controller being shared across multiple memory subsystems. The MPIAS serves the requirements of individual agents, and at the same time operates to achieve maximum DDR bandwidth.

"We continue to have focused growth to serve our high-end ASIC/SoC customers. The MPIAS is an important addition to our existing product portfolio. It is a requirement for today's complex SoC to have guaranteed and controlled DDR Controller bandwidth," says Kishore Mishra.

The product is available immediately for current and potential DDR Controller customers.

About ASIC Architect Products and Services:
ASIC Architect offers a wide range of high speed controller cores -- PCI Express, DDR and SATA Cores, and the solution logic for these high-end cores for ASIC/SoC. The company is headquartered at Santa Clara, CA with a development center at Bhubaneswar, India. Additional information about ASIC Architect, Inc is available at http://www.asic-architectinc.com/.

AMBA is a registered trademark of ARM Limited. AHB is a trademark of ARM Limited. AXI is a trademark of ARM Limited.

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